[{"data":1,"prerenderedAt":131},["ShallowReactive",2],{"post-zh-gpu-lpu-heterogeneous-endgame":3},{"id":4,"title":5,"body":6,"cover":121,"date":122,"description":123,"extension":124,"meta":125,"navigation":126,"path":127,"seo":128,"stem":129,"__hash__":130},"posts/posts/gpu-lpu-heterogeneous-endgame.md","大模型硬件的终局推演：GPU与LPU的异构联姻",{"type":7,"value":8,"toc":110},"minimark",[9,17,20,39,42,47,50,64,69,73,76,79,83,86,90,93,98,101,104,107],[10,11,12],"p",{},[13,14],"img",{"alt":15,"src":16},"","/assets/2026/gpu-lpu-cover.png",[10,18,19],{},"在处理 100K 甚至 1M 超长上下文时，AI 算力面临一个明显的偏科问题：",[21,22,23,32],"ul",{},[24,25,26,27,31],"li",{},"处理输入的",[28,29,30],"strong",{},"预填充 (Prefill)"," 阶段，消耗巨大的浮点算力和显存容量",[24,33,34,35,38],{},"生成输出的",[28,36,37],{},"解码 (Decode)"," 阶段，依赖极低的内存延迟",[10,40,41],{},"目前没有任何单一架构能同时处理好这两件事。",[43,44,46],"h2",{"id":45},"一分离式架构-pd-disaggregation让合适的芯片做擅长的事","一、分离式架构 (PD Disaggregation)：让合适的芯片做擅长的事",[10,48,49],{},"既然没有完美的单芯片，那就用架构来弥补。业界正转向跨硬件的异构协同：",[21,51,52,58],{},[24,53,54,57],{},[28,55,56],{},"重型算力处理重型计算","：让拥有海量高带宽内存 (HBM) 的 GPU 阵列负责批量处理长文本，生成数十 GB 的 KV Cache",[24,59,60,63],{},[28,61,62],{},"极速缓存处理生成延迟","：让抛弃片外内存、采用纯 SRAM 的 Groq LPU 接管后续解码任务，以纳秒级延迟逐字输出",[10,65,66],{},[13,67],{"alt":15,"src":68},"/assets/2026/gpu-lpu-pd-disaggregation.png",[43,70,72],{"id":71},"二编译器用确定性驯服动态网络","二、编译器：用确定性驯服动态网络",[10,74,75],{},"GPU 与 LPU 的结合不止是拉一根网线。GPU 的运算是动态的，而 LPU 需要绝对精确的周期对齐。数据涌入控制不好，LPU 极小的 SRAM 就会被撑爆。",[10,77,78],{},"这里的关键在编译器的拓扑扩展。Groq 的编译器将物理网卡视为一个带有已知延迟的虚拟节点，通过静态内存分配和 RDMA 零拷贝，让 GPU 端生成的数据直接穿透网络，落入 LPU 预先锁定的物理 SRAM 槽位。边算边传，靠纳秒级流水线重叠和边缘 FIFO 队列，把外部不可控的网络抖动转化为内部可控的确定性数据流。",[43,80,82],{"id":81},"三tgv-加持的-copos-面板级封装","三、TGV 加持的 CoPoS 面板级封装",[10,84,85],{},"软件优化只在传输层解决问题。TGV (玻璃通孔) 加持的 CoPoS 面板级封装，把距离问题从物理层面直接消灭。",[87,88,89],"h3",{"id":89},"突破晶圆尺寸限制",[10,91,92],{},"传统硅基 CoWoS 封装受限于 12 英寸圆形晶圆的物理边界。CoPoS 用 500mm 以上的大尺寸矩形玻璃面板替代硅片。GPU 芯粒、LPU 芯粒、HBM 和 SRAM 可以全部高密度封装在同一个模块内部。原本需要机柜级部署的异构系统，被微缩到一块基板上。",[10,94,95],{},[13,96],{"alt":15,"src":97},"/assets/2026/gpu-lpu-copos.png",[87,99,100],{"id":100},"互联带宽与存储扩展",[10,102,103],{},"玻璃基板的电介质特性配合内部数百万 TGV 微孔，消灭了跨设备传输的网络协议延迟。GPU 与 LPU 之间的数据转移带宽可达数十 TB/s。更重要的是，玻璃与硅的热膨胀系数匹配，让 LPU 封装体内可以贴满 SRAM 存储芯粒来扩展容量，不至于因热翘曲失效。",[43,105,106],{"id":106},"总结",[10,108,109],{},"大模型推理硬件的未来，不止是先进制程的堆叠。跨异构架构的编译器作为软件大脑，配合玻璃基板与先进封装的物理骨架，在一块面板上同时实现高吞吐与低延迟，这个方向正在接近落地。",{"title":15,"searchDepth":111,"depth":111,"links":112},2,[113,114,115,120],{"id":45,"depth":111,"text":46},{"id":71,"depth":111,"text":72},{"id":81,"depth":111,"text":82,"children":116},[117,119],{"id":89,"depth":118,"text":89},3,{"id":100,"depth":118,"text":100},{"id":106,"depth":111,"text":106},"/assets/covers/gpu-lpu-heterogeneous-endgame.jpg","2026-03-01T00:00:00.000Z","从分离式架构、确定性编译器到基于 TGV 的 CoPoS 面板级封装，探讨大模型推理硬件如何通过 GPU 与 LPU 的异构协同走向算力奇点。","md",{},true,"/posts/gpu-lpu-heterogeneous-endgame",{"title":5,"description":123},"posts/gpu-lpu-heterogeneous-endgame","D_mpZekJCD9vth8-QF0rASu0Qfmv9cul2gUK0czlKgE",1788681981152]